One of the major effects in reducing the size and weight of electronic power processing systems is directed toward developing high power, fast switching semiconductor devices. Several penalties are induced when silicon controlled rectifiers (SCR) are employed as switching devices. Due to high conduction losses, slow switching speeds, and complex commutation schemes, the SCR has been forced to take a less active role in power and control electronics, especially when high-efficiency power supplies and high-frequency motor drives are deemed desirable. These inherent limitations of the SCR device has hastened the development of its counterpart--power transistors.
In recent years, the increasing availability of high power transistors has opened many new avenues for power electronic applications. High-frequency, low-switching losses and relatively simple commutation schemes are just a few advantages of the power transistor over the SCR. With the present semiconductor device technology, power transistors with a capacity of V.sub.CBO =600 V, I.sub.C =300 A can be manufactured on a single wafer. The development of giant transistors now make it possible to extend their application to higher power processing, such as motor drives, inverters, choppers, and uninterrupted power supplies which were predominated by SCR devices in the past. In particular, the large power transistor has been used in an Ac drive system as shown in FIG. 1 for a brushless permanent magnet motor for electric vehicle propulsion.
The power conditioner of the drive system consists of a chopper and inverter. The chopper regulates the current to provide torque control and the inverter supplies the 3-phase current needed to drive the Ac permanent magnet machine to propel the vehicle. The chopper uses a fast-switching power Darlington for high operating frequencies and low losses demanded by an efficient DC-DC converter. For the relatively low frequency inverter, the rugged, slow-switching power Darlington is used. However high current transistors do not achieve the switching speed performance comparable to their narrow-base-width, low-current counterparts. The physical width of the base must be increased for the power transistor to support higher voltages and currents. Increasing the base width lowers the current gain. To provide the high gain desired, the power Darlington configuraton is used.
The poor switching performance of conventional high power transistorized switches is most recognizable during the turn-off period. The relatively slow turn-off is due to a sluggish sweep-out of minority carriers in the base region. The shift in conduction from the periphery of the emitter to the center causes an increase in the resistance between the base terminal and the emitter terminal. Because of the high series base resistance, an effective reverse drive is needed to facilitate a quick turn-off.
Various schemes have been developed to solve the slow turn-off problem. Described below are several commonly used base drive techniques.
FIG. 2 illustrates a capacitively coupled turn-off circuit. When transistor Q1 is off the totem pole output (pin 5) of the 555 timer is high so that transistor QA is forward biased. An initial high current provides quick turn-on until capacitor C is charged. With transistor Q1 on, pin 5 goes low, turning on transistor QB which provides reverse current to turn off transistor QS.
The advantages of the capacitively coupled scheme are the elimination of a negative, isolated supply, capability of quick turn-on and the simplicity of the drive in operation. The principal limitation of the capacitively coupled turn-off circuit is in the finite amount of charge that can be stored in the capacitor C. For a low power switch this circuit is very practical. But for a high power transistor the limited amount of charge on capacitor C would be less effective in sweeping out the minority carriers for a rapid turn-off.
A pulse transformer is often used for triggering the latching transistor. FIG. 3 illustrates the use of this type of magnetic coupling. When transistor Q.sub.A turns on, primary current goes into the dot shown in the figure producing a current flowing out of the dot in the secondary to turn transistor Q.sub.S on. Transistor Q.sub.B is switched on to provide the opposite effect on the secondary which supplies the reverse current to facilitate a quick turn-off.
Initial high influx of current on both turn-on and turn-off states due to capacitor C aids in quick switching action. Unfortunately, the magnitude limitation on the saturation flux density and the finite cross sectional area of the magnetic core does not allow full on or high percentage on-time capabilities.
FIG. 4 examplifies the dual supply approach. Here transistor Q.sub.1 switches on to provide forward drive for the power transistor Q.sub.S. For the turn off, transistor Q.sub.2 is switched on delivering a reverse current to the base-emitter junction which sweeps out the minority carriers of transistor Q.sub.S. The diode D is used to protect against a high voltage being established across the base-emitter junction caused by the high base-emitter series resistance during the fall time of the turn-off.
Although the circuit requires two power supplies, this base drive allows full on time and delivers reverse biasing during the full off time period no matter how long. The circuit also provides quick turn on via capacitor C parallel to resistor R.
The various styles of turn-off described above are effective for their respective purposes: The capacitively coupled turn-off circuit is excellent for low-power applications. But for high power transistors the capacitor would not be able to store enough charge to effectively turn off the power transistor. The pulse transformer coupling scheme lends itself well for input-output isolation. However, the circuit is rendered inoperative when the power switch is functioning under extreme duty cycle conditions, because of the finite amount of magnetic flux which may be stored in the transformer core. The dual power supply is an adequate candidate for large power devices. But the dual supplies add extra hardware and cost to the the base drive scheme.
Thus, the conventional base drive schemes discussed above are excellent for low power and limited usage, with the exception of the dual power supply approach. As the power level increases, so do the constraints on the power switch. The higher power handling capability of transistors requires higher injection levels of dopant on the base region. In turn, the emitter efficiency is lowered and the series base-emitter resistance is increased. The high series base-emitter resistance inhibits the charge sweep-out rate. Prior base drive circuits do not provide the healthy reverse drive current needed to hasten the charge sweep-out rate of the minority carriers to provide a rapid turn-off.
As the power handling capacity of the transistor increases the current gain reduces. This is due to lower emitter efficiency caused by high-level injection which is aggravated by current crowding. With the lower current gain, either the base drive must be revamped to handle the current needed to successfully turn the switching device on and off proficiently, or a Darlington pair must be used to provide the gain needed to keep the base current at a respectable level.
However, the conventional three-terminal Darlington configuration has an inherent turn-off problem--the uncontrollable charge sweep-out rates. Referring to FIG. 5 the outer power transistor QP requires more time to turn off due to the charge build up in the base region caused by the large drive current of the driver transistor QD. With a larger minority carrier storage, the outer transistor requires heavier drive to sweep the minority carriers off the periphery of the base region than does the driver transistor. The problem develops here because as soon as the conduction shifts to the center of the emitter of transistor QD, the series base-emitter resistance increases, reducing the effectiveness of the reverse drive current on transistor QP. Therefore transistor QP turn-off speed is limited by the amount of current transistor QD will allow during its fall time.